Pipelining (OCR A Level Computer Science)

Revision Note

Jamie Wood

Written by: Jamie Wood

Reviewed by: James Woodhouse

Pipelining

What is Pipelining?

  • Pipelining is the process of carrying out multiple instructions concurrently

  • Each instruction will be at a different stage of the fetch-decode-execute cycle

  • One instruction can be fetched while the previous one is being decoded and the one before is being executed

  • In the case of a branch, the pipeline is flushed

  • This table shows which stage each instruction is at during each step:

 


Fetch


Decode


Execute

Step 1

Instruction A

 

 

Step 2

Instruction B

Instruction A

 

Step 3

Instruction C

Instruction B

Instruction A

Step 4

Instruction D

Instruction C

Instruction B

  • While one instruction is being executed, the next instruction will be decoded and the following instruction will be fetched

How Does Pipelining Improve Processor Performance?

  • Pipelining reduces latency 

  • The CPU is not idle while waiting for the next instruction which increases the speed of execution

  • The next instruction is fetched while the current one is decoded/executed

  • All parts of the processor can be used at any instance in time

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Jamie Wood

Author: Jamie Wood

Expertise: Maths

Jamie graduated in 2014 from the University of Bristol with a degree in Electronic and Communications Engineering. He has worked as a teacher for 8 years, in secondary schools and in further education; teaching GCSE and A Level. He is passionate about helping students fulfil their potential through easy-to-use resources and high-quality questions and solutions.

James Woodhouse

Author: James Woodhouse

Expertise: Computer Science

James graduated from the University of Sunderland with a degree in ICT and Computing education. He has over 14 years of experience both teaching and leading in Computer Science, specialising in teaching GCSE and A-level. James has held various leadership roles, including Head of Computer Science and coordinator positions for Key Stage 3 and Key Stage 4. James has a keen interest in networking security and technologies aimed at preventing security breaches.