Components of the CPU (OCR A Level Computer Science)

Revision Note

Becci Peters

Written by: Becci Peters

Reviewed by: James Woodhouse

Components of the CPU

What is the CPU?

  • The CPU is responsible for processing all data within the computer

  • It is made up of a number of components including:

    • Arithmetic and Logic Unit (ALU)

    • Control Unit (CU)

    • Registers are temporary storage/memory locations inside the CPU which are used for a single specific purpose. They have a faster access speed than RAM / secondary storage. There are a number of registers in the CPU:

      • Program Counter (PC)

      • Accumulator (ACC)

      • Memory Address Register (MAR)

      • Memory Data Register (MDR)

      • Current Instruction Register (CIR)

Diagram of Components Within the CPU

Diagram showing the components of the CPU


Component


Function

Arithmetic and Logic Unit (ALU)

This performs any arithmetic calculations (e.g. adding binary) or any logic comparisons (using AND, OR, NOT)

The ALU is made up of several components

Control Unit

This is where instructions are decoded. The CU also controls the data within the CPU and how it moves around

Program Counter (PC)

This stores the address in memory of the next instruction to be fetched

Accumulator (ACC)

This is where values are stored temporarily, either after they’ve been inputted or loaded, or after being calculated in the ALU

Memory Address Register (MAR)

This is where addresses are stored, either for where data is being sent in memory, or where it is being fetched from

Memory Data Register (MDR)

This is where data/instructions are stored, either before it sent to memory, or after being fetched

Current Instruction Register (CIR)

When an instruction has been fetched from memory it is loaded here before being split into opcode and operand. After this, it will be decoded.


The ALU is made up of several components:

  • Arithmetic circuit

    • This carries out any arithmetic (addition, subtraction, multiplication or division)

  • Logic circuit

    • This carries out operations like AND, OR, NOT, XOR

  • Registers

    • These are additional registers to those mentioned above and can store data

  • Status flags

    • This includes overflow flags (if the value is too large for the register) or could include a zero flag (to tell if the answer is 0 easily)

  • Buses

    • These are used to transport data around the ALU and to other parts of the CPU

Buses

  • There are 3 buses which connect the CPU with the main memory (RAM):

    • Data bus

    • Address bus

    • Control bus

Bus

Purpose

Operation

Data Bus

Holds data being sent to/from the CPU and RAM

Read/Write

Address Bus

Holds addresses being sent to/from the CPU and RAM

Read/Write

Control Bus

Sends Signals to determine whether the other buses are in read or write mode

Sends signals

  • There are also a number of other buses within the CPU which transport data between the different areas

Last updated:

You've read 0 of your 10 free revision notes

Unlock more, it's free!

Join the 100,000+ Students that ❤️ Save My Exams

the (exam) results speak for themselves:

Did this page help you?

Becci Peters

Author: Becci Peters

Expertise: Computer Science

Becci has been a passionate Computing teacher for over 9 years, teaching Computing across the UK helping to engage, interest and develop confidence in the subject at all levels. Working as a Head of Department and then as an educational consultant, Becci has advised schools in England, where her role was to support and coach teachers to improve Computing teaching for all. Becci is also a senior examiner for multiple exam boards covering GCSE & A-level. She has worked as a lecturer at a university, lecturing trainee teachers for Computing.

James Woodhouse

Author: James Woodhouse

Expertise: Computer Science

James graduated from the University of Sunderland with a degree in ICT and Computing education. He has over 14 years of experience both teaching and leading in Computer Science, specialising in teaching GCSE and A-level. James has held various leadership roles, including Head of Computer Science and coordinator positions for Key Stage 3 and Key Stage 4. James has a keen interest in networking security and technologies aimed at preventing security breaches.