System Architecture (Cambridge (CIE) A Level Computer Science) : Revision Note

Robert Hampton

Written by: Robert Hampton

Reviewed by: James Woodhouse

Updated on

Von Neumann Model

What is the Von Neumann model?

  • The Von Neumann model is a design of the CPU which was proposed by Mathematician John Von Neumann in the 1940s, which most general-purpose computers are built upon

  • The Von Neumann model outlines how the computer memory, input/output devices and processor all work together 

Flowchart showing data paths between Secondary Storage, Input/Output Controllers, Processor, Main Memory, Input and Output Devices.
The Von-Neumann model
  • The Von Neumann model consists of:

    • Central processing unit (CPU)

    • Able to access memory directly

    • Memory that can store programs as well as data (registers)

    • Stored programs that contain instructions that can be executed in order

Registers

  • Extremely small, extremely fast memory located in the CPU

  • Hold small amounts of data needed as part of the fetch-execute cycle

  • Includes both:

    • General purpose registers

    • Special purpose registers.

  • A general purpose register can store any data the CPU is currently working on

    • It is flexible and can be used for various operations

Special purpose registers

What is a special purpose register?

  • A special purpose register has a dedicated role within the operation of the CPU

  • There are a number of special purpose registers that control or track data

  • Examples of special purpose registers includes:

    • The Program Counter (PC)

    • The Memory Address Register (MAR)

    • The Memory Data Register (MDR)

    • The Accumulator (ACC)

    • Current Instruction Register (CIR)

    • Index register (IX)

    • Status register (SR)

  • For each of the registers you must know 

    • The name of the register

    • Its acronym

    • The purpose of the register

Name

Acronym

Purpose

Program Counter

PC

  • Holds the memory address of the next instructions to be executed 

  • Increments by 1 as the fetch-decode-execute cycle runs

Memory Address  Register

MAR

  • Holds the memory address of where data or instructions are to be fetched from memory

Memory Data Register

MDR

  • Stores the data or instruction which has been fetched from memory

Current Instruction Register

CIR

  • Stores the instruction the CPU is currently decoding or executing

Accumulator

ACC

  • Stores the results of any calculations that have taken place in the Arithmetic Logic Unit (ALU)

Index Register

IX

  • Stores a value that can be added to an address to get the effective memory address

  • Used for indexed addressing

Status Register

SR

  • Stores flags that reflect the outcome of the CPU operations

  • Holds individual bits (flags) that tell the state of the system after an instruction has been executed

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Robert Hampton

Author: Robert Hampton

Expertise: Computer Science Content Creator

Rob has over 16 years' experience teaching Computer Science and ICT at KS3 & GCSE levels. Rob has demonstrated strong leadership as Head of Department since 2012 and previously supported teacher development as a Specialist Leader of Education, empowering departments to excel in Computer Science. Beyond his tech expertise, Robert embraces the virtual world as an avid gamer, conquering digital battlefields when he's not coding.

James Woodhouse

Reviewer: James Woodhouse

Expertise: Computer Science Lead

James graduated from the University of Sunderland with a degree in ICT and Computing education. He has over 14 years of experience both teaching and leading in Computer Science, specialising in teaching GCSE and A-level. James has held various leadership roles, including Head of Computer Science and coordinator positions for Key Stage 3 and Key Stage 4. James has a keen interest in networking security and technologies aimed at preventing security breaches.